1. Field of the Invention
The invention relates to microcode driven microprocessors. More particularly, the invention relates to an adaptive microprocessor with dynamically reconfigurable microcode.
2. Description of the Related Art
Conventional complex instruction set computers (CISC) utilize microprocessors which execute a broad range of instructions. CISC instructions, also referred to as machine language instructions, typically require multiple clock cycles to execute. Each machine language instruction is executed by a series of smaller, internal operations that are driven by microcode. Conventionally, microcode is stored in a read-only memory (ROM) portion of the microprocessor on the same integrated circuit die as the rest of the microprocessor circuits.
A problem occurs because once the microcode is stored in ROM, the functionality of the microprocessor is inflexible. For example, a single machine language instruction always performs a single particular function.
A further problem occurs because as the microcode grows in size and complexity in order to execute all of the instructions required for a typical microprocessor application, an increase in die size results, as does a corresponding increase in power consumption of the device and decrease in the yield of satisfactory devices.